Most image display applications employing video signals require flicker-free display of large images, particularly those for air defense and air traffic control. More generally, high performance CAD (computer-aided design) systems demand greater processing speeds. Currently, the objectives for many of these applications are formalized as flicker-free images of 2048 by 2048 picture elements ("pixels").
Examples of existing raster graphics systems are Hughes Aircraft Company's HMD-8000, HDP-4000, and CDITEG, Motorola's 8250 and Ramtek's 9465. Most existing state of the art systems are targeted at supporting 1280 by 1024 displays with a 60 Hz, non-interlaced, refresh rate. To provide such a display requires a pixel rate of about 110 MHz.
Such systems generally include an array of bit map memories (BMM), each of which includes a representation of an image which can be sent to a monitor to be displayed. Each resolvable point or pixel of the monitor is mapped to an address in each BMM, and each such address contains a digitally encoded representation of the color and intensity to be displayed at the corresponding pixel. A video multiplexer is used to select which of the BMMs determines the display at any given time. A color look-up table translates the selected raster data stream into the proper color codes for use by the display monitor.
In the above-mentioned raster graphics systems the output of the BMM array is immediately converted to a serial bit data stream at the pixel rate. All further processing including video multiplexing and color look-up is then performed at the pixel rate. This approach limits the achievable pixel rate to a little more than 100 MHz due to device speed limitations.
To achieve raster display systems capable of supporting flicker free refresh of displays with up to 2048 by 2048 resolution requires pixel rates as high as 400 MHz. Such speeds exceed the performance limitations of available processing devices such as video multiplexers and color look-up tables. Even as technological progress provides faster electronic devices, applications demands are expected to outstrip such improvements in the foreseeable future.
Thus, there is a need in the art for a new system architecture to take advantage of the capabilities of present and future devices to permit large flicker-free images. In particular, such an architecture is needed to provide effective pixel rates as high as 400 MHz using available devices.